GC5018_06 Datasheet, PDF (81/134 Pages) Texas Instruments – 8-CHANNEL WIDEBAND RECEIVER

www.ti.com
4.4.4.7 RAGC0_CONFIG0 Register
GC5018
8-CHANNEL WIDEBAND RECEIVER
SLWS169A – MAY 2005 – REVISED NOVEMBER 2005
Register name: RAGC0_CONFIG0
BIT 15
0
0
0
BIT 7
hp_corner_0(2:0)
0
0
0
Page: 0x1840 Address: 0x06
ragc_sync_delay_0(7:0)
0
0
0
0
acc_shift_0(4:0)
0
0
0
0
BIT 8
0
BIT 0
0
ragc_sync_delay_0(7:0) : The input sync to the receive AGC block is delayed by this number of samples.
hp_corner_0(2:0) : Sets the corner frequency of the high pass filter. Larger values result in higher corner
frequencies
acc_shift_0(4:0) : Selects the integrated power measurements result bits to be used as the error lookup
table address. A larger number means fewer samples will have to be integrated to achieve
the same result.
4.4.4.8 RAGC0_CONFIG1 Register
Register name: RAGC0_CONFIG1
BIT 15
0
BIT 7
0
0
err_shift_0(2:0)
0
acc_offset_0(5:0)
0
0
0
0
Page: 0x1840 Address: 0x07
0
0
delay_adj_0(4:0)
0
0
BIT 8
err_shift_0(4:3)
0
0
BIT 0
0
0
acc_offset_0(5:0) : Constant subtracted from the integrated power measurement result before the error
lookup table.
err_shift_0(4:0) : Adjusts the loop gain by controlling the amount of shifting applied to the error lookup
table output. Larger values result in higher gain.
delay_adj_0(4:0) : Sets the delay difference, in samples, between the DVGA outputs and the value
applied to the sample multiplier.
GC5018 GENERAL CONTROL
81