GC5018_06 Datasheet, PDF (105/134 Pages) Texas Instruments – 8-CHANNEL WIDEBAND RECEIVER

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4.4.5.9 PHASEADD0A Register
GC5018
8-CHANNEL WIDEBAND RECEIVER
SLWS169A – MAY 2005 – REVISED NOVEMBER 2005
Register name: PHASEADD0A
BIT 15
0
0
Page: 0x0%00
where:
% = 2×(DDC channel #)+1
Address: 0x08 DOUBLE BUFFERED, REQUIRES SYNC FOR
LOADING
BIT 8
phase_add_a(15:8)
0
0
0
0
0
0
BIT 7
BIT 0
phase_add_a(7:0)
0
0
0
0
0
0
0
0
phase_add_a(15:0) This 32 bit word is used to control the frequency of the NCO. This value is added to
the frequency accumulator every clock cycle (UMTS mode and Main channel in CDMA
mode).
4.4.5.10 PHASEADD1A Register
Register name: PHASEADD1A
BIT 15
0
0
Page: 0x0%00
where:
% = 2×(DDC channel #)+1
Address: 0x09 DOUBLE BUFFERED, REQUIRES SYNC FOR
LOADING
BIT 8
phase_add_a(31:24)
0
0
0
0
0
0
BIT 7
0
0
phase_add_a(23:16)
0
0
0
0
BIT 0
0
0
phase_add_a(31:16) : This 32 bit word is used to control the frequency of the NCO. This value is added
to the frequency accumulator every clock cycle (UMTS mode and A channel in CDMA
mode).
4.4.5.11 PHASEADD0B Register
Register name: PHASEADD0
BIT 15
0
0
BIT 7
0
0
Page: 0x0%00
where:
% = 2×(DDC channel #)+1
Address: 0x0A DOUBLE BUFFERED, REQUIRES SYNC FOR
LOADING
BIT 8
phase_add_b(15:8)
0
0
0
0
0
0
BIT 0
phase_add_b(7:0)
0
0
0
0
0
0
phase_add_b(15:0) : This 32 bit word is used to control the frequency of the NCO. This value is added
to the frequency accumulator every clock cycle (B channel in CDMA mode).
GC5018 GENERAL CONTROL 105