LSM6DSL Datasheet, PDF (61/113 Pages) STMicroelectronics – iNEMO inertial module: always-on 3D accelerometer and 3D gyroscope

LSM6DSL
Register description
9.15
CTRL3_C (12h)
Control register 3 (r/w).
BOOT
BDU
Table 55. CTRL3_C register
H_LACTIVE PP_OD SIM
IF_INC
BLE SW_RESET
BOOT
BDU
H_LACTIVE
PP_OD
SIM
IF_INC
BLE
SW_RESET
Table 56. CTRL3_C register description
Reboot memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
Block Data Update. Default value: 0
(0: continuous update; 1: output registers not updated until MSB and LSB have
been read)
Interrupt activation level. Default value: 0
(0: interrupt output pads active high; 1: interrupt output pads active low)
Push-pull/open-drain selection on INT1 and INT2 pads. Default value: 0
(0: push-pull mode; 1: open-drain mode)
SPI Serial Interface Mode selection. Default value: 0
(0: 4-wire interface; 1: 3-wire interface).
Register address automatically incremented during a multiple byte access with a
serial interface (I²C or SPI). Default value: 1
(0: disabled; 1: enabled)
Big/Little Endian Data selection. Default value 0
(0: data LSB @ lower address; 1: data MSB @ lower address)
Software reset. Default value: 0
(0: normal mode; 1: reset device)
This bit is cleared by hardware after next flash boot.
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