HD64F36024FX Datasheet, PDF (74/386 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 3 Exception Handling
Relative Module Exception Sources
Vector Number Vector Address Priority
CPU
Direct transition by executing 13
the SLEEP instruction
H'001A to H'001B High
External interrupt IRQ0
14
pin
Low-voltage detection
interrupt*¹
H'001C to H'001D
IRQ3
17
H'0022 to H'0023
WKP
18
H'0024 to H'0025

Reserved for system use
20
H’0028 to H’0029
Timer W
Timer W input capture A
21
/compare match A
Timer W input capture B
/compare match B
Timer W input capture C
/compare match C
Timer W input capture D
/compare match D
Timer W overflow
H’002A to H’002B
Timer V
Timer V compare match A 22
Timer V compare match B
Timer V overflow
H'002C to H'002D
SCI3
SCI3 receive data full
23
SCI3 transmit data empty
SCI3 transmit end
SCI3 receive error
H'002E to H'002F
A/D converter
A/D conversion end
25
H'0032 to H'0033
SCI3_2
SCI3_2 receive data full
32
SCI3_2 transmit data empty
SCI3_2 transmit end
SCI3_2 receive error
H'0040 to H'0041
SCI3_3*²
SCI3_3 receive data full
34
SCI3_3 transmit data empty
SCI3_3 transmit end
SCI3_3 receive error
H'0044 to H'0045
Low
Notes: 1. A low-voltage detection interrupt is enabled only in the product with an on-chip power-
on reset and low-voltage detection circuit.
2. The SCI3_3 function is incorporated in the H8/36024.
Rev. 4.00 Sep. 23, 2005 Page 46 of 354
REJ09B0025-0400