HD64F36024FX Datasheet, PDF (186/386 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 11 Timer W
11.5 Operation Timing
11.5.1 TCNT Count Timing
Figure 11.14 shows the TCNT count timing when the internal clock source is selected. Figure
11.15 shows the timing when the external clock source is selected. The pulse width of the external
clock signal must be at least two system clock (φ) cycles; shorter pulses will not be counted
correctly.
φ
Internal
clock
Rising edge
TCNT input
clock
TCNT
N
N+1
N+2
Figure 11.14 Count Timing for Internal Clock Source
φ
External
clock
TCNT input
clock
TCNT
Rising edge
N
Rising edge
N+1
N+2
Figure 11.15 Count Timing for External Clock Source
Rev. 4.00 Sep. 23, 2005 Page 158 of 354
REJ09B0025-0400