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HD64F36024FX Datasheet, PDF (164/386 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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Section 11 Timer W
Table 11.1 Timer W Functions
Item
Count clock
General registers
(output compare/input
capture registers)
Counter clearing function
Initial output value
setting function
Buffer function
Compare
0
match output 1
Toggle
Input capture function
PWM mode
Interrupt sources
Input/Output Pins
Counter FTIOA
FTIOB
FTIOC
FTIOD
Internal clocks: Ï, Ï/2, Ï/4, Ï/8
External clock: FTCI
Period
GRA
specified in
GRA
GRB
GRC (buffer GRD (buffer
register for register for
GRA in
GRB in
buffer mode) buffer mode)
GRA
GRA
â
â
â
compare compare
match
match
â
Yes
Yes
Yes
Yes
â
â
â
â
â
â
Overflow
Yes
Yes
Yes
Yes
Yes
â
Compare
match/input
capture
Yes
Yes
Yes
Yes
Yes
Yes
Compare
match/input
capture
â
Yes
Yes
Yes
Yes
Yes
Compare
match/input
capture
â
Yes
Yes
Yes
Yes
Yes
Compare
match/input
capture
Rev. 4.00 Sep. 23, 2005 Page 136 of 354
REJ09B0025-0400
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