HD64F36024FX Datasheet, PDF (51/386 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Note:
* Refers to the operand size.
B: Byte
W: Word
L: Longword
Section 2 CPU
Table 2.5 Shift Instructions
Instruction Size* Function
SHAL
SHAR
B/W/L Rd (shift) → Rd
Performs an arithmetic shift on general register contents.
SHLL
SHLR
B/W/L Rd (shift) → Rd
Performs a logical shift on general register contents.
ROTL
ROTR
B/W/L Rd (rotate) → Rd
Rotates general register contents.
ROTXL
ROTXR
B/W/L Rd (rotate) → Rd
Rotates general register contents through the carry flag.
Note:
* Refers to the operand size.
B: Byte
W: Word
L: Longword
Rev. 4.00 Sep. 23, 2005 Page 23 of 354
REJ09B0025-0400