HD64F36024FX Datasheet, PDF (181/386 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 11 Timer W
11.4.2 PWM Operation
In PWM mode, PWM waveforms are generated by using GRA as the period register and GRB,
GRC, and GRD as duty registers. PWM waveforms are output from the FTIOB, FTIOC, and
FTIOD pins. Up to three-phase PWM waveforms can be output. In PWM mode, a general register
functions as an output compare register automatically. The output level of each pin depends on the
corresponding timer output level set bit (TOB, TOC, and TOD) in TCRW. When TOB is 1, the
FTIOB output goes to 1 at compare match A and to 0 at compare match B. When TOB is 0, the
FTIOB output goes to 0 at compare match A and to 1 at compare match B. Thus the compare
match output level settings in TIOR0 and TIOR1 are ignored for the output pin set to PWM mode.
If the same value is set in the cycle register and the duty register, the output does not change when
a compare match occurs.
Figure 11.9 shows an example of operation in PWM mode. The output signals go to 1 and TCNT
is cleared at compare match A, and the output signals go to 0 at compare match B, C, and D (TOB,
TOC, and TOD = 1: initial output values are set to 1).
TCNT value
GRA
GRB
GRC
GRD
H'0000
FTIOB
FTIOC
FTIOD
Counter cleared by compare match A
Figure 11.9 PWM Mode Example (1)
Time
Rev. 4.00 Sep. 23, 2005 Page 153 of 354
REJ09B0025-0400