HD64F36024FX Datasheet, PDF (20/386 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Figure 5.5 Typical Connection to Ceramic Resonator.................................................................. 66
Figure 5.6 Example of External Clock Input ................................................................................ 67
Figure 5.7 Example of Incorrect Board Design ............................................................................ 68
Section 6 Power-Down Modes
Figure 6.1 Mode Transition Diagram ........................................................................................... 73
Section 7 ROM
Figure 7.1 Flash Memory Block Configuration............................................................................. 78
Figure 7.2 Programming/Erasing Flowchart Example in User Program Mode............................ 85
Figure 7.3 Program/Program-Verify Flowchart ............................................................................ 87
Figure 7.4 Erase/Erase-Verify Flowchart ..................................................................................... 90
Section 9 I/O Ports
Figure 9.1 Port 1 Pin Configuration.............................................................................................. 95
Figure 9.2 Port 2 Pin Configuration............................................................................................ 100
Figure 9.3 Port 5 Pin Configuration............................................................................................ 102
Figure 9.4 Port 7 Pin Configuration............................................................................................ 108
Figure 9.5 Port 8 Pin Configuration............................................................................................ 112
Figure 9.6 Port B Pin Configuration........................................................................................... 115
Section 10 Timer V
Figure 10.1 Block Diagram of Timer V ..................................................................................... 118
Figure 10.2 Increment Timing with Internal Clock .................................................................... 127
Figure 10.3 Increment Timing with External Clock................................................................... 127
Figure 10.4 OVF Set Timing ...................................................................................................... 127
Figure 10.5 CMFA and CMFB Set Timing................................................................................ 128
Figure 10.6 TMOV Output Timing ............................................................................................ 128
Figure 10.7 Clear Timing by Compare Match............................................................................ 128
Figure 10.8 Clear Timing by TMRIV Input ............................................................................... 129
Figure 10.9 Pulse Output Example ............................................................................................. 130
Figure 10.10 Example of Pulse Output Synchronized to TRGV Input....................................... 131
Figure 10.11 Contention between TCNTV Write and Clear ...................................................... 132
Figure 10.12 Contention between TCORA Write and Compare Match ..................................... 133
Figure 10.13 Internal Clock Switching and TCNTV Operation ................................................. 133
Section 11 Timer W
Figure 11.1 Timer W Block Diagram......................................................................................... 137
Figure 11.2 Free-Running Counter Operation ............................................................................ 148
Figure 11.3 Periodic Counter Operation..................................................................................... 149
Figure 11.4 0 and 1 Output Example (TOA = 0, TOB = 1)........................................................ 149
Figure 11.5 Toggle Output Example (TOA = 0, TOB = 1) ........................................................ 150
Figure 11.6 Toggle Output Example (TOA = 0, TOB = 1) ........................................................ 150
Rev. 4.00 Sep. 23, 2005 Page xviii of xxvi