HD64F36024FX Datasheet, PDF (15/386 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

11.3.6 Timer I/O Control Register 1 (TIOR1) ................................................................. 145
11.3.7 Timer Counter (TCNT)......................................................................................... 147
11.3.8 General Registers A to D (GRA to GRD)............................................................. 147
11.4 Operation ........................................................................................................................... 148
11.4.1 Normal Operation ................................................................................................. 148
11.4.2 PWM Operation.................................................................................................... 153
11.5 Operation Timing............................................................................................................... 158
11.5.1 TCNT Count Timing ............................................................................................ 158
11.5.2 Output Compare Output Timing ........................................................................... 159
11.5.3 Input Capture Timing............................................................................................ 160
11.5.4 Timing of Counter Clearing by Compare Match .................................................. 160
11.5.5 Buffer Operation Timing ...................................................................................... 161
11.5.6 Timing of IMFA to IMFD Flag Setting at Compare Match.................................. 161
11.5.7 Timing of IMFA to IMFD Setting at Input Capture ............................................. 162
11.5.8 Timing of Status Flag Clearing............................................................................. 163
11.6 Usage Notes ....................................................................................................................... 163
Section 12 Watchdog Timer ..............................................................................167
12.1 Features.............................................................................................................................. 167
12.2 Register Descriptions ......................................................................................................... 168
12.2.1 Timer Control/Status Register WD (TCSRWD)................................................... 168
12.2.2 Timer Counter WD (TCWD)................................................................................ 169
12.2.3 Timer Mode Register WD (TMWD) .................................................................... 170
12.3 Operation ........................................................................................................................... 171
Section 13 Serial Communication Interface 3 (SCI3) .......................................173
13.1 Features.............................................................................................................................. 173
13.2 Input/Output Pins ............................................................................................................... 177
13.3 Register Descriptions ......................................................................................................... 177
13.3.1 Receive Shift Register (RSR) ............................................................................... 178
13.3.2 Receive Data Register (RDR) ............................................................................... 178
13.3.3 Transmit Shift Register (TSR) .............................................................................. 178
13.3.4 Transmit Data Register (TDR).............................................................................. 178
13.3.5 Serial Mode Register (SMR) ................................................................................ 179
13.3.6 Serial Control Register 3 (SCR3).......................................................................... 180
13.3.7 Serial Status Register (SSR) ................................................................................. 182
13.3.8 Bit Rate Register (BRR) ....................................................................................... 184
13.3.9 SCI3_3 Module Control Register (SMCR)........................................................... 191
13.4 Operation in Asynchronous Mode ..................................................................................... 192
13.4.1 Clock..................................................................................................................... 192
Rev. 4.00 Sep. 23, 2005 Page xiii of xxvi