4552 Datasheet, PDF (73/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4552 Group
Key-on wakeup control register K0
Port P12, P13 key-on wakeup
K03
control bit (Note 3)
Port P10, P11 key-on wakeup
K02
control bit (Note 2)
Port P02, P03 key-on wakeup
K01
control bit
Port P00, P01 key-on wakeup
K00
control bit
at reset : 00002
at power down : state retained
0
Key-on wakeup not used
1
Key-on wakeup used
0
Key-on wakeup not used
1
Key-on wakeup used
0
Key-on wakeup not used
1
Key-on wakeup used
0
Key-on wakeup not used
1
Key-on wakeup used
Key-on wakeup control register K1
Ports P12, P13 return condition selection bit
K13
(Note 3)
Ports P12, P13 valid waveform/level
K12
selection bit (Note 3)
Ports P10, P11 return condition selection bit
K11
(Note 2)
Ports P10, P11 valid waveform/level
K10
selection bit (Note 2)
at reset : 00002
at power down : state retained
0
Returned by edge
1
Returned by level
0
Falling waveform/“L” level
1
Rising waveform/“H” level
0
Returned by edge
1
Returned by level
0
Falling waveform/“L” level
1
Rising waveform/“H” level
Key-on wakeup control register K2
at reset : 00002
at power down : state retained
K23 Not used
K22 Not used
K21 INT pin return condition selection bit
K20 INT pin key-on wakeup control bit
0
This bit has no function, but read/write is enabled.
1
0
This bit has no function, but read/write is enabled.
1
0
Returned by level
1
Returned by edge
0
Key-on wakeup invalid
1
Key-on wakeup valid
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: To be invalid (K02 = “0”) key-on wakeup of ports P10 and P11, set the registers K10 and K11 to “0”.
3: To be invalid (K03 = “0”) key-on wakeup of ports P12 and P13, set the registers K12 and K13 to “0”.
R/W
TAK0/
TK0A
R/W
TAK1/
TK1A
R/W
TAK2/
TK2A
Rev.3.02 Dec 22, 2006 page 73 of 142
REJ03B0023-0302