4552 Datasheet, PDF (141/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4552 Group
PIN CONFIGURATION (TOP VIEW)
VDD
SCLK
SDA
SEG9
SEG10
SEG11
SEG12
VSS
SEG14
SEG15
SEG16
P20/SEG17
P21/SEG18
38 37 36 35 34 33 32 31 30 29 28 27 26 25
39
24
40
23
41
22
42
21
43
M34552G8FP
20
44
M34552G8HFP
19
45
18
46
17
47
16
48
15
1 2 3 4 5 6 7 8 9 10 11 12 13 14
XCOUT/D7
XCIN/D6
CNVSS
XOUT
XIN
VSS
VDD
C/CNTR
D5/INT
D4
VPP
XOUT
XIN
VSS
VDD
VDD
Fig. 69 Pin configuration of built-in PROM version
ROM CODE ACCESS PROTECTION
We would like to support a simple ROM code protection function
that prevents a party other than the ROM-code owner to read and
reprogram the built-in PROM code of the MCU.
First, Programmers must check the ID-code of the MCU.
If the ID-code is not blank, Programmer verifies it with the input ID-
code. When the ID-codes do not match, Programmer will reject all
further operations.
The MCU has each 10 bits of dedicated ROM spaces in address
009016 to 009616, as an ID-code (referred to as “the ID-code”) en-
abling a Programmer to verify with the input ID-code and validate
further operations.
Note: SEG13 pin is not existed in the 4552 Group.
Address
009016
ID1
009116
ID2
009216
ID3
009316
ID4
009416
ID5
009516
ID6
009616
ID7
009716
Rev.3.02 Dec 22, 2006 page 141 of 142
REJ03B0023-0302
Fig. 70 ROM-Code Protection ID Location