4552 Datasheet, PDF (123/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4552 Group
Skip condition
Datailed description
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(P) = 1
(WDF1) = 1
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– Transfers the contents of LCD control register L1 to register A.
– Transfers the contents of register A to LCD control register L1.
– Transfers the contents of register A to LCD control register L2.
– Transfers the contents of register A to LCD control register L3.
– Transfers the contents of register A to LCD control register C1.
– Transfers the contents of register A to LCD control register C2.
– Selects the RC oscillation circuit for main clock, stops the on-chip oscillator (internal oscillator).
– Transfers the contents of clock control regiser MR to register A.
– Transfers the contents of register A to clock control register MR.
– Transfers the contents of register A to clock control register RG.
– No operation; Adds 1 to program counter value, and others remain unchanged.
– Puts the system in clock operating mode by executing the POF instruction after executing the EPOF instruction.
– Puts the system in RAM back-up mode by executing the POF2 instruction after executing the EPOF instruction.
– Makes the immediate after POF or POF2 instruction valid by executing the EPOF instruction.
– Skips the next instruction when the P flag is “1”.
After skipping, the P flag remains unchanged.
– Clears (0) to the WDF1 flag and skips the next instruction when watchdog timer flag WDF1 is “1.” When the
WDF1 flag is “0”, executes the next instruction. Also, stops the watchdog timer function when executing the
WRST instruction immediately after the DWDT instruction.
– Stops the watchdog timer function by the WRST instruction.
– System reset occurs.
– Clears (0) to the high-order bit reference enable flag UPTF.
– Sets (1) to the high-order bit reference enable flag UPTF.
– Validates the voltage drop detection circuit at power down (clock operating mode and RAM back-up mode).
Rev.3.02 Dec 22, 2006 page 123 of 142
REJ03B0023-0302