4552 Datasheet, PDF (134/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4552 Group
RECOMMENDED OPERATING CONDITIONS 1
(One Time PROM version: Ta = –20 °C to 85 °C, VDD = 1.8 to 3.6 V, unless otherwise noted)
Symbol
Parameter
Conditions
VDD
Supply voltage
f(STCK) ≤ 4.4 MHz
(when ceramic resonator is used) f(STCK) ≤ 2.2 MHz
f(STCK) ≤ 1.1 MHz
VDD
Supply voltage
(when quartz-crystal/on-chip
oscillator is used)
VDD
Supply voltage
f(STCK) ≤ 4.4 MHz
(when RC oscillation is used)
VRAM
RAM back-up voltage
at RAM back-up mode
VSS
Supply voltage
VLC3
LCD power supply (Note 1)
VIH
“H” level input voltage
P0, P1, P2, D0–D5
XIN, XCIN
RESET
INT
CNTR
VIL
“L” level input voltage
P0, P1, P2, D0–D5
XIN, XCIN
RESET
INT
CNTR
IOH(peak) “H” level peak output current
P0, P1, P2, D0–D5
C, CNTR
VDD = 3 V
VDD = 3 V
IOH(avg) “H” level average output current P0, P1, P2, D0–D5
VDD = 3 V
(Note 2)
C, CNTR
VDD = 3 V
IOL(peak) “L” level peak output current
P0, P1, P2, D0–D7,
VDD = 3 V
C, CNTR
RESET
VDD = 3 V
IOL(avg) “L” level average output current P0, P1, P2, D0–D7,
VDD = 3 V
(Note 2)
C, CNTR
RESET
VDD = 3 V
ΣIOH(avg) “H” level total average current
P0, P1, P2, D0–D5, C, CNTR
ΣIOL(avg) “L” level total average current
P0, P1, P2, D0–D5, C, CNTR
D6, D7, RESET
Notes 1: At 1/2 bias: VLC1 = VLC2 = (1/2)•VLC3
At 1/3 bias: VLC1 = (1/3)•VLC3, VLC2 = (2/3)•VLC3
2: The average output current is the average value during 100 ms.
Limits
Min.
Typ.
Max. ^Unit
2.7
3.6
V
2
3.6
1.8
3.6
1.8
3.6
V
2.7
3.6
V
1.6
V
0
V
1.8
VDD
V
0.8VDD
VDD
V
0.7VDD
VDD
0.85VDD
VDD
0.85VDD
VDD
0.8VDD
VDD
0
0.2VDD V
0
0.3VDD
0
0.3VDD
0
0.15VDD
0
0.15VDD
–10 mA
–15
–5
mA
–10
12
mA
4
7
mA
2
–40 mA
60
mA
60
Rev.3.02 Dec 22, 2006 page 134 of 142
REJ03B0023-0302