4552 Datasheet, PDF (70/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4552 Group
W43
Timer control register W4
Timer LC control bit
W42
W41
W40
Timer LC count source selection bit
CNTR output auto-control circuit
selection bit
CNTR pin input count edge selection bit
at reset : 00002
at power down : state retained
0 Stop (state retained)
1 Operating
0
Bit 4 (T34) of timer 3
1 System clock (STCK)
0 CNTR output auto-control circuit not selected
1 CNTR output auto-control circuit selected
0 Falling edge
1 Rising edge
R/W
TAW4/TW4A
LCD control register L1
at reset : 00002
at power down : state retained
R/W
TAL1/TL1A
Internal dividing resistor for LCD power
L13
supply selection bit (Note 2)
0
2r ✕ 3, 2r ✕ 2
1
r ✕ 3, r ✕ 2
L12
LCD control bit
0
Stop
1
Operating
L11
LCD duty and bias selection bits
L10
L11 L10
00
01
10
11
Duty
Bias
Not available
1/2
1/2
1/3
1/3
1/4
1/3
LCD control register L2
at reset : 00002
at power down : state retained
0
SEG0
L23 SEG0/VLC3 pin function switch bit (Note 3)
1
VLC3
0
SEG1
L22 SEG1/VLC2 pin function switch bit (Note 4)
1
VLC2
0
SEG2
L21 SEG2/VLC1 pin function switch bit (Note 4)
1
VLC1
L20
Internal dividing resistor for LCD power
supply control bit
0
Internal dividing resistor valid
1
Internal dividing resistor invalid
W
TL2A
LCD control register L3
at reset : 11112
L33
P23/SEG20 pin function switch bit
L32
P22/SEG19 pin function switch bit
L31
P21/SEG18 pin function switch bit
L30
P20/SEG17 pin function switch bit
0
SEG20
1
P23
0
SEG19
1
P22
0
SEG18
1
P21
0
SEG17
1
P20
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: “r (resistor) multiplied by 3” is used at 1/3 bias, and “r multiplied by 2” is used at 1/2 bias.
3: VLC3 is connected to VDD internally when SEG0 pin is selected.
4: Use internal dividing resistor when SEG1 and SEG2 pins are selected.
at power down : state retained
W
TL3A
Rev.3.02 Dec 22, 2006 page 70 of 142
REJ03B0023-0302