4552 Datasheet, PDF (53/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4552 Group
(6) Return signal
An external wakeup signal or timer 3 interrupt request flag (T3F) is
used to return from the clock operating mode.
An external wakeup signal is used to return from the RAM back-up
mode because the oscillation is stopped.
Table 16 shows the return condition for each return source.
(7) Control registers
• Key-on wakeup control register K0
Register K0 controls the ports P0 and P1 key-on wakeup func-
tion. Set the contents of this register through register A with the
TK0A instruction. In addition, the TAK0 instruction can be used to
transfer the contents of register K0 to register A.
• Key-on wakeup control register K1
Register K1 controls the return condition and the selection of
valid waveform/level of port P1. Set the contents of this register
through register A with the TK1A instruction. In addition, the TAK1
instruction can be used to transfer the contents of register K0 to
register A.
• Key-on wakeup control register K2
Register K2 controls the INT pin key-on wakeup function and the
selection of return codition. Set the contents of this register
through register A with the TK2A instruction. In addition, the TAK2
instruction can be used to transfer the contents of register K2 to
register A.
• Pull-up control register PU0
Register PU0 controls the ON/OFF of the port P0 pull-up transis-
tor. Set the contents of this register through register A with the
TPU0A instruction. In addition, the TAPU0 instruction can be
used to transfer the contents of register PU0 to register A.
• Pull-up control register PU1
Register PU1 controls the ON/OFF of the port P1 pull-up transis-
tor. Set the contents of this register through register A with the
TPU1A instruction. In addition, the TAPU1 instruction can be
used to transfer the contents of register PU1 to register A.
• External interrupt control register I1
Register I1 controls the valid waveform of the external 0 inter-
rupt, the input control of INT pin and the return input level. Set
the contents of this register through register A with the TI1A in-
struction. In addition, the TAI1 instruction can be used to transfer
the contents of register I1 to register A.
Table 16 Return source and return condition
Return source
Return condition
Ports P00–P03 Return by an external falling edge
(“H”→“L”).
Ports P10–P13 Return by an external “H” level or “L”
level input, or rising edge (“L”→“H”)
or falling edge (“H”→“L”).
Return by an external “L” level input.
INT pin
Return by an external “H” level or “L”
level input, or rising edge (“L”→“H”)
or falling edge (“H”→“L”).
When the return level is input, the in-
terrupt request flag (EXF0) is not set.
Timer 3 interrupt Return by timer 3 underflow or by
request flag (T3F) setting T3F to “1”.
It can be used in the clock operating
mode.
Remarks
The key-on wakeup function can be selected by two port unit.
The key-on wakeup function can be selected by two port unit. Select the re-
turn level (“L” level or “H” level) and return condition (return by level or
edge) with register K1 according to the external state before going into the
power down state.
Select the return level (“L” level or “H” level) with register I1 and return con-
dition (return by level or edge) with register K2 according to the external
state before going into the power down state.
Clear T3F with the SNZT3 instruction before system enters into the power
down state.
When system enters into the power down state while T3F is “1”, system re-
turns from the state immediately because it is recognized as return
condition.
Rev.3.02 Dec 22, 2006 page 53 of 142
REJ03B0023-0302