4552 Datasheet, PDF (47/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4552 Group
(5) LCD power supply circuit
Select the LCD power supply circuit suitable for the using LCD
panel.
The LCD power supply circuit is fixed by the followings;
• The internal dividing resistor is controlled by bit 0 of register L2.
• The internal dividing resistor is selected by bit 3 of register L1.
• The bias condition is selected by bits 0 and 1 of register L1.
qVLC3/SEG0 pin
The selection of VLC3/SEG0 pin function is controlled with the bit
3 of register L2.
When the VLC3 pin function is selected, apply voltage of VLC3 <
VDD to the pin externally.
When the SEG0 pin function is selected, VLC3 is connected to
VDD internally.
qInternal dividing resistor
The 4552 Group has the internal dividing resistor for LCD power
supply.
When bit 0 of register L2 is set to “0”, the internal dividing resis-
tor is valid. However, when the LCD is turned off by setting bit 2
of register L1 to “0”, the internal dividing resistor is turned off.
The same six resistor (r) is prepared for the internal dividing re-
sistor. According to the setting value of bit 3 of register L1 and
using bias condition, the resistor is prepared as follows;
• L13 = “0”, 1/3 bias used: 2r ✕ 3 = 6r
• L13 = “0”, 1/2 bias used: 2r ✕ 2 = 4r
• L13 = “1”, 1/3 bias used: r ✕ 3 = 3r
• L13 = “1”, 1/2 bias used: r ✕ 2 = 2r
q VLC2/SEG1, VLC1/SEG2 pin
The selection of VLC2/SEG1 pin function is controlled with the bit
2 of register L2.
The selection of VLC1/SEG2 pin function is controlled with the bit
1 of register L2.
When the VLC2 pin and VLC1 pin functions are selected and the
internal dividing resistor is not used, apply voltage of
0<VLC1<VLC2<VLC3 to these pins. Short the VLC2 pin and VLC1
pin at 1/2 bias.
When the VLC2 pin and VLC1 pin functions are selected and the
internal dividing resistor is used, the dividing voltage value gen-
erated internally is output from the VLC1 pin and VLC2 pin. The
VLC2 pin and VLC1 pin have the same electric potential at 1/2 bias.
When SEG1 and SEG2 pin functions are selected, use the inter-
nal dividing resistor. In this time, VLC2 and VLC1 are connected to
the generated dividingg voltage.
VLC3
VLC2
VLC1
SEG0
SEG1
SEG2
a) Register L2=(0000)2
VLC3
VLC2
VLC1
VLC3
SEG1
SEG2
b) Register L2=(1000)2
VLC3
VLC2
VLC1
VLC3
VLC2
VLC1
VLC3
VLC2
VLC1
VLC3
VLC2
VLC1
c) Register L2=(1110)2
d) Register L2=(1111)2
Fig. 36 LCD power supply circuit example (1/3 bias condition selected)
Rev.3.02 Dec 22, 2006 page 47 of 142
REJ03B0023-0302