4552 Datasheet, PDF (31/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4552 Group
XCIN
ORCLK
W 33
0
1
W32
Timer 3 (16)
1 - - 4 - - - - - - - - 13 14 15 16
W31, W30
11
10
01
00
Timer 3
T3F _interrupt
STCK
W 42
0
1
W43
Timer LC (4)
Timer 3 underflow signal (T3UDF)
LCD
1/2 _clock
Reload register RLC (4)
(TLCA)
(TLCA)
Register A
INTSNC
Watchdog timer
1 - - - - - - - - - - - - - - 16
SQ
WDF1
WRST instruction R
RESET signal S Q
(Note)
WEF
DWDT instruction R
+
WRST instruction
Notes: The WEF flag is set to “1” at system reset or RAM back-up mode.
Data is set automatically from each reload register
when timer underflows
(auto-reload function).
Fig. 23 Timer structure (2)
D Q Watchdog reset signal
T R ^{RESET signal}
Rev.3.02 Dec 22, 2006 page 31 of 142
REJ03B0023-0302