4552 Datasheet, PDF (119/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4552 Group
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Datailed description
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– Transfers the contents of register A to timer control register PA.
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– Transfers the contents of timer control register W1 to register A.
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– Transfers the contents of register A to timer control register W1.
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– Transfers the contents of timer control register W2 to register A.
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– Transfers the contents of register A to timer control register W2.
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– Transfers the contents of timer control register W3 to register A.
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– Transfers the contents of register A to timer control register W3.
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– Transfers the contents of timer control register W4 to register A.
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– Transfers the contents of register A to timer control register W4.
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– Transfers the high-order 4 bits of prescaler to register B, and transfers the low-order 4 bits of prescaler to
register A.
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– Transfers the contents of register B to the high-order 4 bits of prescaler and prescaler reload register RPS,
and transfers the contents of register A to the low-order 4 bits of prescaler and prescaler reload register
RPS.
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– Transfers the high-order 4 bits of timer 1 to register B, and transfers the low-order 4 bits of timer 1 to regis-
ter A.
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– Transfers the contents of register B to the high-order 4 bits of timer 1 and timer 1 reload register R1, and
transfers the contents of register A to the low-order 4 bits of timer 1 and timer 1 reload register R1.
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– Transfers the high-order 4 bits of timer 2 to register B, and transfers the low-order 4 bits of timer 2 to regis-
ter A.
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– Transfers the contents of register B to the high-order 4 bits of timer 2 and timer 2 reload register R2L, and
transfers the contents of register A to the low-order 4 bits of timer 2 and timer 2 reload register R2L.
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– Transfers the contents of register B to the high-order 4 bits of timer 2 reload register R2H, and transfers the
contents of register A to the low-order 4 bits of timer 2 reload register R2H.
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– Transfers the contents of register B to the high-order 4 bits of timer 1 reload register R1, and transfers the
contents of register A to the low-order 4 bits of timer 1 reload register R1.
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– Transfers the contents of timer 2 reload register R2L to timer 2.
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– Transfers the contents of register A to timer LC and timer LC reload register RLC.
V12 = 0: (T1F) = 1
V13 = 0: (T2F) =1
V20 = 0: (T3F) = 1
– When V12 = 0 : Clears (0) to the T1F flag and skips the next instruction when timer 1 interrupt request flag
T1F is “1”. When the T1F flag is “0”, executes the next instruction.
When V12 = 1 : This instruction is equivalent to the NOP instruction. (V12: bit 2 of interrupt control register V1)
– When V13 = 0 : Clears (0) to the T2F flag and skips the next instruction when timer 2 interrupt request flag
T2F is “1”. When the T2F flag is “0”, executes the next instruction.
When V13 = 1 : This instruction is equivalent to the NOP instruction. (V13: bit 3 of interrupt control register V1)
– When V20 = 0 : Clears (0) to the T3F flag and skips the next instruction when timer 3 interrupt request flag
T3F is “1”. When the T3F flag is “0”, executes the next instruction.
When V20 = 1 : This instruction is equivalent to the NOP instruction. (V20: bit 0 of interrupt control register V2)
Rev.3.02 Dec 22, 2006 page 119 of 142
REJ03B0023-0302