4552 Datasheet, PDF (144/145 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

REVISION HISTORY
4552 Group Data Sheet
Rev. Date
Description
Page
Summary
3.01 Jun.15, 2005 All pages Delete the following: “PRELIMINARY”.
36 •Prescaler and Timer 1 count start timing and count time when operation starts,
•Timer 2 and Timer LC count start timing and count time when operation starts
added.
61 13 Prescaler and Timer 1 count start timing and count time when operation starts,
14 Timer and Timer LC count start timing and count time when operation starts
added.
3.02 Dec. 22, 2006 29, 33 Use of output signal of prescaler: LC eliminated.
30, 31 Fig.22, Fig.23: Note added.
31 Fig.23: INSTCK (wrong) → INTSNC (correct)
32, 69 PA0: Stop (state initialized) → (state retained)
W31 W30: Timer 3 count source selection bits → Timer 3 count value selection
bits
33 (2) Prescaler (interrupt function): PRS (wrong) → RPS (correct)
34 (5) Timer 3 (interrupt function): Description added.
48 Fig.37: Clock (wrong) → f(RING) (correct)
52 Table 15
Timer 3 function (RAM back-up): O → (Note 3)
Timer interrupt request flag (RAM back-up): O → (Note 3)
54 Fig.44: Note 1 added.
55, 73 Table 17: Notes 2 and 3 added.
60 to 63 NOTES ON NOISE added.
64 ➀ Noise and latch-up prevention: Description added.
77, 120, SZD: (Y) = 0 to 7 → 0 to 5
121
93 SZD: Detailed description revised.
132 VRST-, VRST+: Test condition revised.
132, 138 Note 4: (power current) → (supply current)
→ Pages 16 to 18, 20, 27, 54, 66: RAM back-up mode → power down mode
Pages 77, 90 to 92, 116 to 119: SNZ0, SNZT1, SNZT2, SNZT3 revised.
Pages 78, 109, 122, 123: WRST revised.
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