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MC68HC908GP32 Datasheet, PDF (74/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)
Freescale Semiconductor, Inc.
Resets and Interrupts
4.3.3.1 Power-On Reset
A power-on reset (POR) is an internal reset caused by a positive
transition on the VDD pin. VDD at the POR must go completely to 0 V to
reset the MCU. This distinguishes between a reset and a POR. The POR
is not a brown-out detector, low-voltage detector, or glitch detector.
A power-on reset:
• Holds the clocks to the CPU and modules inactive for an oscillator
stabilization delay of 4096 CGMXCLK cycles
• Drives the RST pin low during the oscillator stabilization delay
• Releases the RST pin 32 CGMXCLK cycles after the oscillator
stabilization delay
• Releases the CPU to begin the reset vector sequence 64
CGMXCLK cycles after the oscillator stabilization delay
• Sets the POR and LP bits in the SIM reset status register and
clears all other bits in the register
OSC1
PORRST(1)
CGMXCLK
4096
32
32
CYCLES CYCLES CYCLES
CGMOUT
RST PIN
INTERNAL
RESET
1. PORRST is an internally generated power-on reset pulse.
Figure 4-2. Power-On Reset Recovery
Technical Data
72
MC68HC908GP32•MC68HC08GP32 — Rev. 6
Resets and Interrupts
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