MC68HC908GP32 Datasheet, PDF (117/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Freescale Semiconductor, Inc.
Clock Generator Module (CGMC)
Functional Description
6. Calculate and verify the adequacy of the VCO and bus
frequencies f_VCLK and f_BUS.
f_VCLK = (2^P × N ⁄ R) × f_RCLK
f_BUS = (f_VCLK) ⁄ 4
7. Select the VCO’s power-of-two range multiplier E, according to
this table:
Frequency Range
E
0 < f_VCLK < 9,830,400
0
9,830,400 ≤ f_VCLK < 19,660,800
1
19,660,800 ≤ f_VCLK < 39,321,600
2
NOTE: Do not program E to a value of 3.
8. Select a VCO linear range multiplier, L, where f_NOM = 38.4 kHz
L
=
ro
un

d

2----^E--f--V-×^{---C--f-LN---K-}_O^----_M^{---}
9. Calculate and verify the adequacy of the VCO programmed
center-of-range frequency, f_VRS. The center-of-range frequency is
the midpoint between the minimum and maximum frequencies
attainable by the PLL.
f_VRS = (L × 2^E)f_NOM
For proper operation,
f_VRS – f_VCLK
≤
f_{--N----O----M------}×_-----2_---^E_--
2
NOTE:
10. Verify the choice of P, R, N, E, and L by comparing f_VCLK to f_VRS
and f_VCLKDES. For proper operation, f_VCLK must be within the
application’s tolerance of f_VCLKDES, and f_VRS must be as close as
possible to f_VCLK.
Exceeding the recommended maximum bus frequency or VCO
frequency can crash the MCU.
MC68HC908GP32•MC68HC08GP32 — Rev. 6
MOTOROLA
Clock Generator Module (CGMC)
For More Information On This Product,
Go to: www.freescale.com
Technical Data
115