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MC68HC908GP32 Datasheet, PDF (406/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)
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MC68HC08GP32
Freescale Semiconductor, Inc.
A.8.3 3.0-V DC Electrical Characteristics
Characteristic(1)
VDD supply current
Run(3)
Wait(4)
Stop(5)
25 °C
25 °C with TBM enabled(6)
25 °C with TBM enabled(7)
25 °C with LVI and TBM enabled(6)
–40 °C to 85 °C
–40 °C to 85 °C with TBM enabled(7)
–40 °C to 85 °C with LVI and TBM enabled(6)
Low-voltage inhibit, trip falling voltage
Low-voltage inhibit, trip rising voltage
Low-voltage inhibit reset/recover hysteresis
(VTRIPF + VHYS = VTRIPR)
Notes:
Symbol
IDD
VTRIPF
VTRIPR
VHYS
Min
—
—
—
—
—
—
—
—
—
2.45
2.50
—
Typ(2)
5.2
1.65
1
12
25
200
—
—
300
2.60
2.66
60
Max
8
4
—
—
—
—
5
50
—
2.70
2.80
—
Unit
mA
mA
µA
µA
µA
µA
µA
µA
µA
V
V
mV
1. VDD = 3.0 Vdc ± 10%, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) IDD measured using external square wave clock source (fOSC = 16.4 MHz). All inputs 0.2V from rail. No
dc loads. Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
affects run IDD. Measured with all modules enabled.
4. Wait IDD measured using external square wave clock source (fOSC = 16.4 MHz). All inputs 0.2 V from rail. No dc loads.
Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects
wait IDD. Measured with PLL and LVI enabled.
5. Stop IDD is measured with OSC1 = VSS.
6. Stop IDD with TBM enabled is measured using an external square wave clock source (fOSC = 16.4 MHz). All inputs 0.2V
from rail. No dc loads. Less than 100 pF on all outputs. All inputs configured as inputs.
7. Measured with TBM enabled using 32kHz crystal.
16
14
12
10
8
6
4
2
5.5 V
3.3 V
0
1
2
3
4
5
6
7
8
9
fBUS (MHz)
Figure A-5. Typical Operating IDD
Technical Data
MC68HC908GP32•MC68HC08GP32 — Rev. 6
404
MC68HC08GP32
MOTOROLA
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