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MC68HC908GP32 Datasheet, PDF (123/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)
Freescale Semiconductor, Inc.
Clock Generator Module (CGMC)
CGMC Registers
7.5.8 Crystal Output Frequency Signal (CGMXCLK)
CGMXCLK is the crystal oscillator output signal. It runs at the full speed
of the crystal (fXCLK) and comes directly from the crystal oscillator circuit.
Figure 7-2 shows only the logical relation of CGMXCLK to OSC1 and
OSC2 and may not represent the actual circuitry. The duty cycle of
CGMXCLK is unknown and may depend on the crystal and other
external factors. Also, the frequency and amplitude of CGMXCLK can be
unstable at startup.
7.5.9 CGMC Base Clock Output (CGMOUT)
CGMOUT is the clock output of the CGMC. This signal goes to the SIM,
which generates the MCU clocks. CGMOUT is a 50 percent duty cycle
clock running at twice the bus frequency. CGMOUT is software
programmable to be either the oscillator output, CGMXCLK, divided by
two or the VCO clock, CGMVCLK, divided by two.
7.5.10 CGMC CPU Interrupt (CGMINT)
CGMINT is the interrupt signal generated by the PLL lock detector.
7.6 CGMC Registers
These registers control and monitor operation of the CGMC:
• PLL control register (PCTL)
(See 7.6.1 PLL Control Register.)
• PLL bandwidth control register (PBWC)
(See 7.6.2 PLL Bandwidth Control Register.)
• PLL multiplier select register high (PMSH)
(See 7.6.3 PLL Multiplier Select Register High.)
• PLL multiplier select register low (PMSL)
(See 7.6.4 PLL Multiplier Select Register Low.)
MC68HC908GP32•MC68HC08GP32 — Rev. 6
MOTOROLA
Clock Generator Module (CGMC)
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Technical Data
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