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MC68HC908GP32 Datasheet, PDF (195/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)
Freescale Semiconductor, Inc.
Low-Voltage Inhibit (LVI)
LVI Status Register
14.5 LVI Status Register
The LVI status register (LVISR) indicates if the VDD voltage was
detected below the VTRIPF level.
Address: $FE0C
Bit 7
6
5
4
3
2
1
Bit 0
Read: LVIOUT
0
0
0
0
0
0
0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 14-3. LVI Status Register (LVISR)
LVIOUT — LVI Output Bit
This read-only flag becomes set when the VDD voltage falls below the
VTRIPF trip voltage. (See Table 14-1.) Reset clears the LVIOUT bit.
Table 14-1. LVIOUT Bit Indication
VDD
VDD > VTRIPR
VDD < VTRIPF
VTRIPF < VDD < VTRIPR
LVIOUT
0
1
Previous value
MC68HC908GP32•MC68HC08GP32 — Rev. 6
MOTOROLA
Low-Voltage Inhibit (LVI)
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Technical Data
193