MC68HC908GP32 Datasheet, PDF (194/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Freescale Semiconductor, Inc.
Low-Voltage Inhibit (LVI)
14.4.2 Forced Reset Operation
In applications that require V_DD to remain above the V_TRIPF level,
enabling LVI resets allows the LVI module to reset the MCU when V_DD
falls below the V_TRIPF level. In the configuration register, the LVIPWRD
and LVIRSTD bits must be at logic 0 to enable the LVI module and to
enable LVI resets.
14.4.3 Voltage Hysteresis Protection
Once the LVI has triggered (by having V_DD fall below V_TRIPF), the LVI
will maintain a reset condition until V_DD rises above the rising trip point
voltage, V_TRIPR. This prevents a condition in which the MCU is
continually entering and exiting reset if V_DD is approximately equal to
V_TRIPF. V_TRIPR is greater than V_TRIPF by the hysteresis voltage, V_HYS.
14.4.4 LVI Trip Selection
The LVI5OR3 bit in the configuration register selects whether the LVI is
configured for 5-V or 3-V protection.
NOTE:
The microcontroller is guaranteed to operate at a minimum supply
voltage. The trip point (V_TRIPF [5 V] or V_TRIPF [3 V]) may be lower than
this. (See Section 23. Electrical Specifications for the actual trip point
voltages.)
Technical Data
192
MC68HC908GP32•MC68HC08GP32 — Rev. 6
Low-Voltage Inhibit (LVI)
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