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| MC68HC908GP32 Datasheet, PDF (193/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs) | |||
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Freescale Semiconductor, Inc.
Low-Voltage Inhibit (LVI)
Functional Description
An LVI reset also drives the RST pin low to provide low-voltage
protection to external peripheral devices.
VDD
LVIPWRD
FROM CONFIG
STOP INSTRUCTION
FROM CONFIG1
LVIRSTD
LVISTOP
FROM CONFIG1
LOW VDD
DETECTOR
VDD > LVITrip = 0
VDD ⤠LVITrip = 1
LVI5OR3
FROM CONFIG1
LVIOUT
LVI RESET
Figure 14-1. LVI Module Block Diagram
Addr. Register Name
Bit 7
6
5
4
3
2
Read: LVIOUT
0
0
0
0
0
$FE0C
LVI Status Register
(LVISR)
Write:
Reset: 0
0
0
0
0
0
= Unimplemented
Figure 14-2. LVI I/O Register Summary
1
Bit 0
0
0
0
0
14.4.1 Polled LVI Operation
In applications that can operate at VDD levels below the VTRIPF level,
software can monitor VDD by polling the LVIOUT bit. In the configuration
register, the LVIPWRD bit must be at logic 0 to enable the LVI module,
and the LVIRSTD bit must be at logic 1 to disable LVI resets.
MC68HC908GP32â¢MC68HC08GP32 â Rev. 6
MOTOROLA
Low-Voltage Inhibit (LVI)
For More Information On This Product,
Go to: www.freescale.com
Technical Data
191
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