MC68HC908GP32 Datasheet, PDF (108/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Freescale Semiconductor, Inc.
Clock Generator Module (CGMC)
7.6.5
7.6.6
PLL VCO Range Select Register . . . . . . . . . . . . . . . . . . . . 129
PLL Reference Divider Select Register . . . . . . . . . . . . . . . 130
7.7 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
7.8 Special Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
7.8.1 Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
7.8.2 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
7.8.3 CGMC During Break Interrupts . . . . . . . . . . . . . . . . . . . . . 132
7.9 Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . . . .133
7.9.1 Acquisition/Lock Time Definitions. . . . . . . . . . . . . . . . . . . . 133
7.9.2 Parametric Influences on Reaction Time . . . . . . . . . . . . . . 134
7.9.3 Choosing a Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
7.2 Introduction
This section describes the clock generator module. The CGMC
generates the crystal clock signal, CGMXCLK, which operates at the
frequency of the crystal. The CGMC also generates the base clock
signal, CGMOUT, which is based on either the crystal clock divided by
two or the phase-locked loop (PLL) clock, CGMVCLK, divided by two. In
user mode, CGMOUT is the clock from which the SIM derives the
system clocks, including the bus clock, which is at a frequency of
CGMOUT/2. In monitor mode, PTC3 determines the bus clock. The PLL
is a fully functional frequency generator designed for use with crystals or
ceramic resonators. The PLL can generate an 8-MHz bus frequency
using a 32-kHz crystal.
Technical Data
106
MC68HC908GP32•MC68HC08GP32 — Rev. 6
Clock Generator Module (CGMC)
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