English
Language : 

MC68HC908GP32 Datasheet, PDF (329/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)
Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
I/O Signals
When an SPI is configured as a master, the SS input can be used in
conjunction with the MODF flag to prevent multiple masters from driving
MOSI and SPSCK. (See 20.8.2 Mode Fault Error.) For the state of the
SS pin to set the MODF flag, the MODFEN bit in the SPSCK register
must be set. If the MODFEN bit is low for an SPI master, the SS pin can
be used as a general-purpose I/O under the control of the data direction
register of the shared I/O port. With MODFEN high, it is an input-only pin
to the SPI regardless of the state of the data direction register of the
shared I/O port.
The CPU can always read the state of the SS pin by configuring the
appropriate pin as an input and reading the port data register. (See
Table 20-3.)
Table 20-3. SPI Configuration
SPE SPMSTR MODFEN
0
X(1)
X
1
0
X
1
1
0
1
1
1
Note 1. X = Don’t care
SPI Configuration
Not enabled
Slave
Master without MODF
Master with MODF
State of SS Logic
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
General-purpose I/O;
SS ignored by SPI
Input-only to SPI
20.13.5 CGND (Clock Ground)
CGND is the ground return for the serial clock pin, SPSCK, and the
ground for the port output buffers. It is internally connected to VSS as
shown in Table 20-1.
MC68HC908GP32•MC68HC08GP32 — Rev. 6
MOTOROLA
Serial Peripheral Interface Module (SPI)
For More Information On This Product,
Go to: www.freescale.com
Technical Data
327