MC68HC908GP32 Datasheet, PDF (140/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Freescale Semiconductor, Inc.
Configuration Register (CONFIG)
NOTE:
On a FLASH device, the options except LVI5OR3 are one-time writeable
by the user after each reset. The LVI5OR3 bit is one-time writeable by
the user only after each POR (power-on reset). The CONFIG registers
are not in the FLASH memory but are special registers containing one-
time writeable latches after each reset. Upon a reset, the CONFIG
registers default to predetermined settings as shown in Figure 8-1 and
Figure 8-2.
Address: $001E
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
OSC- SCIBD-
Write:
STOPENB SRC
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 8-1. Configuration Register 2 (CONFIG2)
Address: $001F
Bit 7
6
5
4
3
2
1
Read:
COPRS LVISTOP LVIRSTD LVIPWRD LVI5OR3 SSREC
Write:
STOP
Reset: 0
0
0
0 See Note 0
0
Note: LVI5OR3 bit is only reset via POR (power-on reset)
Figure 8-2. Configuration Register 1 (CONFIG1)
Bit 0
COPD
0
OSCSTOPENB— Oscillator Stop Mode Enable Bar Bit
OSCSTOPENB enables the oscillator to continue operating during
stop mode. Setting the OSCSTOPENB bit allows the oscillator to
operate continuously even during stop mode. This is useful for driving
the timebase module to allow it to generate periodic wakeup while in
stop mode. (See 3.6 Clock Generator Module (CGM) subsection
3.6.2 Stop Mode.)
1 = Oscillator enabled to operate during stop mode
0 = Oscillator disabled during stop mode (default)
Technical Data
138
MC68HC908GP32•MC68HC08GP32 — Rev. 6
Configuration Register (CONFIG)
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