MC68HC908GP32 Datasheet, PDF (205/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Freescale Semiconductor, Inc.
Monitor ROM (MON)
Functional Description
15.4.4 Baud Rate
The communication baud rate is controlled by the crystal frequency and
the state of the PTC3 pin (when IRQ is set to V_TST) upon entry into
monitor mode. When PTC3 is high, the divide by ratio is 1024. If the
PTC3 pin is at logic 0 upon entry into monitor mode, the divide by ratio
is 512.
If monitor mode was entered with V_DD on IRQ, then the divide by ratio is
set at 1024, regardless of PTC3. If monitor mode was entered with V_SS
on IRQ, then the internal PLL steps up the external frequency, presumed
to be 32.768 kHz, to 2.4576 MHz. These latter two conditions for monitor
mode entry require that the reset vector is blank.
Table 15-3 lists external frequencies required to achieve a standard
baud rate of 9600 BPS. Other standard baud rates can be accomplished
using proportionally higher or lower frequency generators. If using a
crystal as the clock source, be aware of the upper frequency limit that the
internal clock module can handle. See 23.8 5.0-V Control Timing and
23.9 3.0-V Control Timing for this limit.
Table 15-3. Monitor Baud Rate Selection
External
Frequency
4.9152 MHz
9.8304 MHz
9.8304 MHz
32.768 kHz
IRQ
V_TST
V_TST
V_DD
V_SS
PTC3
0
1
X
X
Internal
Frequency
2.4576 MHz
2.4576 MHz
2.4576 MHz
2.4576 MHz
Baud Rate
(BPS)
9600
9600
9600
9600
15.4.5 Commands
The monitor ROM firmware uses these commands:
• READ (read memory)
• WRITE (write memory)
• IREAD (indexed read)
MC68HC908GP32•MC68HC08GP32 — Rev. 6
MOTOROLA
Monitor ROM (MON)
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Technical Data
203