MC68HC908GP32 Datasheet, PDF (403/410 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Freescale Semiconductor, Inc.
MC68HC08GP32
$FE0C
LVI Status Register (LVISR)
$FE0D
↓
$FE0F
Unimplemented
3 Bytes
$FE10
↓
$FE1F
Unimplemented
16 Bytes
Reserved for Compatibility with Monitor Code
for A-Family Parts
$FE20
↓
$FF52
Monitor ROM
307 Bytes
$FF53
↓
$FF7D
Unimplemented
43 Bytes
$FF7E
Reserved
$FF7F
↓
$FFDB
Unimplemented
93 Bytes
Note: $FFF6–$FFFD
reserved for
8 security bytes
$FFDC
↓
$FFFF
ROM Vectors
36 Bytes
Figure A-2. MC68HC08GP32 Memory Map (Continued)
A.5 Mask Option Registers
The two mask option registers at $001E and $001F (see Figure A-3 and
Figure A-4) are read-only registers. They are defined by mask options
(hard-wired connections) specified at the same time as the ROM code
submission.
On the MC68HC908GP32, these two registers are called configuration
registers (CONFIG2 and CONFIG1).
MC68HC908GP32•MC68HC08GP32 — Rev. 6
MOTOROLA
MC68HC08GP32
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Technical Data
401