M38203M4 Datasheet, PDF (310/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPENDIX
3.3 Control registers
Interrupt edge selection register
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt edge selection register (INTEDGE) [Address 3A16]
B
Name
Functions
0 INT0 interrupt edge
selection bit
1 INT1 interrupt edge
selection bit
2 INT2 interrupt edge
selection bit
3 INT3 interrupt edge
selection bit
0 : Falling edge active
1 : Rising edge active
0 : Falling edge active
1 : Rising edge active
0 : Falling edge active
1 : Rising edge active
0 : Falling edge active
1 : Rising edge active
4 Nothing is allocated. These bits cannot be
to written to and are fixed to “0” at reading.
7
At reset R W
0
0
0
0
0 0×
Fig. 3.3.16 Structure of interrupt edge selection register
CPU mode register
b7 b6 b5 b4 b3 b2 b1 b0
1
CPU mode register (CPUM) [Address 3B16]
B
Name
0 ^{Processor mode bits}
1
Functions
b1b0
00: Single-chip mode
01:
10: Not available
11:
At reset R W
0
0
2 ^{Stack page selection 0: 0 page}
bit
1: 1 page
3 Fix this bit to “1.”
0
1 ₁₁
4 ^{Port XC switch bit}
0: I/O port
0
1: XCIN, XCOUT
5 ^{Main clock (XIN–XOUT)} 0: Oscillating
0
stop bit
1: Stopped
6 Main clock division 0: f(XIN)/2
1
ratio selection bit
(high-speed mode)
1: f(XIN)/8
(middle-speed mode)
7
Internal system clock
selection bit
0: XIN–XOUT selected
(middle-/high-speed mode)
0
1: XCIN–XCOUT selected
(low-speed mode)
Fig. 3.3.17 Structure of CPU mode register
3–26
3820 GROUP USER’S MANUAL