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M38203M4 Datasheet, PDF (211/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER | |||
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APPLICATION
2.5 Serial I/O1
sBRG count source selection bit (bit 0)
This bit selects a count source to be input to the BRG. In the â0â state, an undivided XIN input signal
is input to the BRG. In the â1â state, an XIN input signal divided by 4 is input to the BRG.
sSerial I/O1 synchronization clock selection bit (bit 1)
This bit selects a synchronizing clock to be used in the serial I/O1.
qClock synchronous mode
When this bit is set to â0,â a BRG output divided by 4 becomes a shift clock.
In the â1â state, an external clock (P46/SCLK1 pin input) becomes a shift clock as it is.
qUART mode
In the â0â state, a BRG output divided by 16 becomes a shift clock. In the â1â state, an external clock
(P46/SCLK1 pin input) divided by 16 becomes a shift clock.
sSRDY1 output enable bit (bit 2)
When the SRDY1 function is used in the clock synchronous mode, set this bit to â1.â In the â0â state,
the P47/SRDY1 pin functions as an I/O port P47.
In the UART mode, the value of this bit is invalid, so that the P47/SRDY1 pin functions as an I/O port
P47.
sTransmit interrupt source selection bit (bit 3)
This bit determines a source which generates a serial I/O1 transmit interrupt request. In the â0â state,
a serial I/O1 transmit interrupt request occurs at the time when the values of the transmit buffer
register are transferred to the transmit shift register.
In the â1â state, a serial I/O1 transmit interrupt request occurs at the time when the shift operation of
the transmit shift register is completed.
sTransmit enable bit (bit 4)
This bit controls a transmit operation. This bit controls as shown in Table 2.5.3 only when the serial
I/O1 enable bit is â1â (serial I/O1 enabled). When the serial I/O1 enable bit is â0â (serial I/O1 disabled),
this bit is invalid.
Table 2.5.3 Control contents of transmit enable bit
Transmit enable bit
P45/TXD pin function
Transmit buffer empty flag V1
Transmit shift register
shift completion flagV2
0
Port P45
Set to â0â
1
Data transmit pin TXD
V1: Bit 0 of serial I/O1 status register
V2: Bit 2 of serial I/O1 status register
Flag function is valid
3820 GROUP USERâS MANUAL
2â125
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