M38203M4 Datasheet, PDF (179/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.4 Timer 1, timer 2, and timer 3
(2) Timer 123 mode register (T123M)
The timer 123 mode register (address 002916) consists of TOUT output control bit, the count source
selection bits, and others. Figure 2.4.8 shows the structure of the timer 123 mode register. Each bit
is described below.
Timer 123 mode register
b7 b6 b5 b4 b3 b2 b1 b0
Timer 123 mode register (T123M) [Address 2916]
B
Name
0 TOUT output active
edge switch bit
Functions
0 : Start at “H” output
1 : Start at “L” output
At reset R W
0
1 TOUT output control _{0 : TOUT output disabled}
0
bit
1 : TOUT output enabled
2 ^{Timer 2 write control 0 : Write value in latch and}
0
bit
counter
1 : Write value in latch only
3 Timer 2 count source ^{0 : Timer 1 underflow}
0
selection bit
1 : f(XIN)/16
(Middle-/high-speed mode)
f(XCIN)/16
(Low-speed mode) (Note)
4 Timer 3 count source 0 : Timer 1 underflow
0
selection bit
1 : f(XIN)/16
(Middle-/high-speed mode)
f(XCIN)/16
(Low-speed mode) (Note)
5 Timer 1 count source ^{0 : f(XIN)/16}
0
selection bit
(Middle-/high-speed mode)
f(XCIN)/16
(Low-speed mode) (Note)
1 : f(XCIN)
6, 7 ^{Nothing is allocated. These bits cannot be}
written to and are fixed to “0” at reading.
0 0^×
Note: Internal clock φ is f(XCIN)/2 in the low-speed mode.
Fig. 2.4.8 Structure of timer 123 mode register
3820 GROUP USER’S MANUAL
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