M38203M4 Datasheet, PDF (223/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.5 Serial I/O1
(3) Initialization of serial I/O1 operation
The operating procedure of the serial I/O1 control register for initialization of the serial I/O1 operation
is described below.
sInitialization of receive operation
By setting the receive enable bit (bit 5 of SIO1CON) to “0” or setting the serial I/O1 enable bit (bit 7
of SIO1CON) to “0,” the receive operation is stopped and initialized as shown below. The initialization
items of receive operation are as follows.
•Stopping and initializing the shift clock to the receive shift register.
•Setting the receive shift register to “0.”
•Setting each error flag (overrun error flag, parity error flag, framing error flag, summing error flag) to
“0.”
•Setting the receive buffer full flag (RBF) to “0.”
sInitialization of transmit operation
Basically, the transmit operation is stopped and initialized by setting the transmit enable bit (bit 4 of
SIO1CON) to “0.” The initialization items of transmit operation are as follows.
•Stopping and initializing the shift clock to the transmit shift register.
•Setting the receive shift register to “0.” (However, when an external clock is used in the clock
synchronous mode, the receive shift register is not set to “0” unless the input clock of the SCLK1 pin
is “H.”)
•Setting the transmit buffer empty flag (bit 0 of SIO1STS) and the transmit shift register shift comple-
tion flag (bit 2 of SIO1STS) to “0.”
(When bit 4 is set to “0,” bits 0 and 2 are cleared to “0” forcibly. After that, when bit 4 is set to “1,”
bits 0 and 2 are set to “1.”)
When all conditions below are satisfied, initialization is not performed only by setting bit 4 of SIO1CON
to “0.” It is also necessary to set bit 5 of SIO1CON to “0.”
•In the full duplex data transfer
•In the clock synchronous mode
•When an internal clock is used
•When bit 5 of SIO1CON is “1” (receive enabled)
In the clock synchronous mode of the full duplex data transfer, the same clock is used for transmission
and reception.
When an internal clock is used, the shift clock is started by writing data into the transmit buffer at both
transmission and reception, so both transmit and receive operations use a clock generating circuit of
the transmitter.
Because of this, the serial I/O1 is designed so that even if only a receive operation is performed, the
transmit circuit may be operated internally to generate a shift clock when an internal clock is used in
the clock synchronous mode. Accordingly, note that the transmitter may operate even when bit 4 of
SIO1CON is “0.” The transmit operation cannot be initialized only by setting the serial I/O1 enable bit
(bit 7 of SIO1CON) to “0.”
3820 GROUP USER’S MANUAL
2–137