M38203M4 Datasheet, PDF (108/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.2 Interrupts
2.2.3 Related registers
Figure 2.2.7 shows memory allocation of interrupt-related registers. Each of these registers is described
below.
Address
003A16 Interrupt edge selection register (INTEDGE)
003B16
003C16
003D16
003E16
003F16
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Interrupt control register 2 (ICON2)
Fig. 2.2.7 Memory allocation of interrupt-related registers
(1) Interrupt edge selection register (address 003A16)
The interrupt edge selection register selects an active edge of each INT interrupt.
Bit 0 to bit 3 select active edges of INT0–INT3 pins inputs. In the “0” state, the falling edge ( ) of
the corresponding pin input is active. In the “1” state, the rising edge ( ) of the corresponding pin
input is active. Figure 2.2.8 shows the structure of the interrupt edge selection register.
Interrupt edge selection register
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt edge selection register (INTEDGE) [Address 3A16]
B
Name
Functions
0 INT0 interrupt edge ^{0 : Falling edge active}
selection bit
1 : Rising edge active
1 INT1 interrupt edge ^{0 : Falling edge active}
selection bit
1 : Rising edge active
2 ^{INT2 interrupt edge 0 : Falling edge active}
selection bit
1 : Rising edge active
3 INT3 interrupt edge ^{0 : Falling edge active}
selection bit
1 : Rising edge active
4 ^{Nothing is allocated. These bits cannot be}
to ^{written to and are fixed to “0” at reading.}
7
At reset R W
0
0
0
0
0 0^×
Fig. 2.2.8 Structure of interrupt edge selection register
2–22
3820 GROUP USER’S MANUAL