M38203M4 Datasheet, PDF (307/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPENDIX
3.3 Control registers
Timer 123 mode register
b7 b6 b5 b4 b3 b2 b1 b0
Timer 123 mode register (T123M) [Address 2916]
B
Name
0 TOUT output active
edge switch bit
Functions
0 : Start at “H” output
1 : Start at “L” output
At reset R W
0
1 TOUT output control _{0 : TOUT output disabled}
0
bit
1 : TOUT output enabled
2 Timer 2 write control ^{0 : Write value in latch and}
0
bit
counter
1 : Write value in latch only
3 ^{Timer 2 count source 0 : Timer 1 underflow}
0
selection bit
1 : f(XIN)/16
(Middle-/high-speed mode)
f(XCIN)/16
(Low-speed mode) (Note)
4 Timer 3 count source ^{0 : Timer 1 underflow}
0
selection bit
1 : f(XIN)/16
(Middle-/high-speed mode)
f(XCIN)/16
(Low-speed mode) (Note)
5 Timer 1 count source 0 : f(XIN)/16
0
selection bit
(Middle-/high-speed mode)
f(XCIN)/16
(Low-speed mode) (Note)
1 : f(XCIN)
6, 7 Nothing is allocated. These bits cannot be
0 0^×
written to and are fixed to “0” at reading.
Note: Internal clock φ is f(XCIN)/2 in the low-speed mode.
Fig. 3.3.11 Structure of timer 123 mode register
φ output control register
b7 b6 b5 b4 b3 b2 b1 b0
φ output control register (CKOUT) [Address 2A16]
B
Name
0 φ output control bit
Functions
At reset R W
0: Port function
0
1: φ clock output
(Port direction register
= “1”)
1 _{Nothing is allocated. These bits cannot be}
to _{written to and are fixed to “0” at reading.}
7
0 0×
Fig. 3.3.12 Structure of φ output control register
3820 GROUP USER’S MANUAL
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