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M38203M4 Datasheet, PDF (109/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER | |||
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APPLICATION
2.2 Interrupts
(2) Interrupt request register 1 (IREQ1) and interrupt request register 2 (IREQ2)
The interrupt request register 1 (address 003C16) and the interrupt request register 2 (address 003D16)
indicate whether an interrupt request has occurred or not.
Figure 2.2.9 shows the structure of the interrupt request register 1 and Figure 2.2.10 shows the
structure of the interrupt request register 2.
The occurrence of an interrupt request causes the corresponding bit to be set to â1.â This interrupt
request bit is automatically cleared to â0â by the acceptance of the interrupt request.
The interrupt request bits can be set to â0â by software, but it cannot be set to â1â by software.
The occurrence of each interrupt is controlled by the interrupt enable bits (refer to the next item).
Interrupt request register 1
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt request register 1 (IREQ1) [Address 3C16]
B
Name
0 INT0 interrupt request
bit
1 INT1 interrupt request
bit
2 Serial I/O1 receive
interrupt request bit
3 Serial I/O1 transmit
interrupt request bit
4 Timer X interrupt
request bit
5 Timer Y interrupt
request bit
6 Timer 2 interrupt
request bit
7 Timer 3 interrupt
request bit
Functions
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
At reset R W
0
V
0
V
0
V
0
V
0
V
0
V
0
V
0
V
V : â0â can be set by software, but â1â cannot be set.
Fig. 2.2.9 Structure of interrupt request register 1
3820 GROUP USERâS MANUAL
2â23
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