M38203M4 Datasheet, PDF (249/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.7 LCD drive control circuit
(3) Port P0 direction register (P0D)
When it is specified that pins P00/SEG24–P07/SEG31 are used as I/O ports by bits 1 and 2 of the
segment output enable register (address 003816), the setting of the port P0 direction register (address
000116) is valid.
When bit 0 of the port P0 direction register is set to “1,” port P0 is an output port. When this bit is
set to “0,” the port is an input port, so that the setting of bit 0 of the PULL register A (address 001616)
becomes valid. At reset, bit 0 of the port P0 direction register is set to “0.”
Figure 2.7.4 shows the structure of the port P0 direction register.
Port P0 direction register
b7 b6 b5 b4 b3 b2 b1 b0
Port P0 direction register (P0D) [Address 0116]
B
Name
Functions
At reset R W
0 ^{Port P0 direction} 0: All bits are input mode 0 ^×
register
1: All bits are output mode
1 Nothing is allocated. These bits cannot be
0 ^××
to written to and be read out.
7
Fig. 2.7.4 Structure of port P0 direction register
3820 GROUP USER’S MANUAL
2–163