M38203M4 Datasheet, PDF (264/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.9 Standby function
sRestoration by an interrupt request
The occurrence of an interrupt request in the stop mode releases the stop mode. As a result, oscil-
lation is resumed. The interrupt requests available for restoration are:
•INT0–INT3
•Serial I/O1 transmit/receive and serial I/O2 using an external clock
•Timer X/Y using an external clock
•Key input (key-on wake up)
However, to use the above interrupt requests for restoration from the stop mode, after setting the
following, execute the STP instruction in order to enable the interrupt request to be used.
[Necessary register setting]
Œ Interrupt disable flag I = “0” (interrupts enabled)
 Both timers 1 and 2 interrupt enable bits = “0” (interrupts disabled)
Ž Interrupt request bit of the interrupt source to be used for restoration = “0” (no interrupt request
issued)
 Interrupt enable bit of the interrupt source to be used for restoration = “1” (interrupts enabled)
For interrupts, refer to “2.2 Interrupts.”
The oscillation is unstable at start of oscillation. For this reason, time for stabilizing of oscillation
(oscillation stabilizing time) is required. At restoration by an interrupt request, the time to wait for
supplying the internal clock φ to the CPU is automatically generated^V1 by timers 1^V2 and 2.^V2 This wait
time is reserved as the oscillation stabilizing time on the system clock side.
Figure 2.9.2 shows an execution sequence example at restoration by the occurrence of an INT0
interrupt request.
V1: At restoration from the stop mode, all bits except bit 4 of the timer 123 mode register (address
002916) are set to “0.”
As a count source of the timer 1, an f(XIN)/16 or f(XCIN)/16 clock is selected. As a count source
of the timer 2, the timer 1 underflow is selected.
Immediately after the oscillation is started, the count source is supplied to the timer 1 counter, so
that a count operation is started. The supplying the internal clock φ to the CPU is started at the
timer 2 underflow.
V2: When the STP instruction is executed, “FF16” and “0116” are automatically set in the timer 1
counter/latch and timer 2 counter/latch respectively.
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3820 GROUP USER’S MANUAL