M38203M4 Datasheet, PDF (212/344 Pages) Mitsubishi Electric Semiconductor – 8-BIT SINGLE-CHIP MICROCOMPUTER

APPLICATION
2.5 Serial I/O1
sReceive enable bit (bit 5)
This bit controls receive operation. This bit controls as shown in Table 2.5.4 only when the serial
I/O1 enable bit (bit 7) is “1” (serial I/O1 enabled). When the serial I/O1 enable bit is “0” (serial I/O1
disabled), this bit is invalid.
Table 2.5.4 Control contents of receive enable bit
Receive enable bit
P44/RXD pin function
Receive buffer full flag ^V1
0
Port P44
Set to “0”
1
Data receive pin RXD Flag function is valid
V1: Bit 1 of serial I/O1 status register
V2: Bits 3, 4, 5, and 6 of serial I/O1 status register
Each error flag^V2
sSerial I/O1 mode selection bit (bit 6)
This bit selects a transmit/receive mode of the serial I/O1. In the UART mode, set this bit to “0.” In
the clock synchronous mode, set it to “1.”
sSerial I/O1 enable bit (bit 7)
When the serial I/O1 function is used, set this bit to “1.”
When the bit is set to “1,” the pins P44/RxD, P45/TxD, and P46/SCLK1 function as RxD, TxD, and SCLK1
respectively (Furthermore, when the SRDY1 output enable bit is set to “1,” the P47/SRDY1 pin functions
as an SRDY1 pin).
In the “0” state, they function as ports P44–P47 respectively.
2–126
3820 GROUP USER’S MANUAL