MRF24XA_15 Datasheet, PDF (89/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

4.0 GENERAL TRANSCEIVER
OPERATIONS
4.1 MAC Architecture
The architecture of MAC layer processing is illustrated
in Figure 4-1.
In reception, the receive signal processor acquires the
synchronization header of the frame on-air, and demod-
ulates the frame starting from the LENGTH field. The
demodulated data is written directly into the Receiver
Buffer (Default, Buffer 2) if the targeted buffer is declared
empty (RXBUFFUL = 0). After LENGTH number of
bytes are received into the buffer and RSV data are
appended, the frame is parsed according to the selected
Framing mode (IEEE 802.15.4 or proprietary). The
Frame Control Sequence (FCS) is checked to detect
corruption by noise. Corrupted frames or frames not
addressed to this node are rejected (discarded), which
the host configures. Rejection means that reception is
completed now and the Receive Buffer status remains
empty (RXBUFFUL = 0). It is configurable whether the
frame is discarded silently or generates an interrupt to
the host.
If a frame is accepted and Acknowledge is requested
for the frame, then the radio turns to transmit and sends
an Acknowledgment. As other features, automatic
ACK-sending are enabled or bypassed.
If the frame is the duplicate of a previously received
and accepted frame then the frame is discarded
(following Acknowledgment). Otherwise, the frame is
the first copy of an accepted frame, which must be
reported to the host. To lock the buffer from being
overwritten by a new frame, RXBUFFUL is
automatically set (1). RXIF interrupt is generated for
the host, which completes the reception.
MRF24XA
The host MCU can only access the Receive Buffer
when RXBUFFUL is set (1). To free up the buffer, the
host clears RXBUFFUL (0).
If the frame is encrypted or contains an authentication
tag (MIC), the host MCU must run the decrypt/
authenticate operation before it reads the payload and
frees up the buffer.
When sending, the host MCU constructs the frame and
downloads it to the transmit buffer (Default, Buffer 0),
and triggers transmission after the last byte. The device
processes the content of the buffer in-place. After pars-
ing, a security processing takes place if required, finally
an FCS is generated and appended to the frame. The
LENGTH is adjusted each time an authentication tag
(MIC) or FCS is appended to the frame.
After in-place frame processing the medium is
accessed using the Carrier Sense Multiple Access with
Collision Avoidance (CSMA-CA). The RF transmit
chain is only enabled when the channel is free, or if
CSMA is bypassed. As soon as the RF can transmit,
the Transmit Signal Processor starts sending the
Synchronization Header (SHR) and followed by the
buffer content up the FCS. If an Acknowledgment is
requested then the RF chain is turned into receive. If
ACK is not received before the expiration of a time-out,
the transmission can automatically start over from
CSMA through SHR-transmission, and then
transmitting the SHR-transmission frame if configured.
After successful sending an interrupt is generated to
the host MCU. Only either the TX MAC or the RX MAC
is active at a time.
 2015 Microchip Technology Inc.
Preliminary
DS70005023C-page 89