MRF24XA_15 Datasheet, PDF (184/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

MRF24XA
6.8.5
NWK LAYER SECURITY
EXAMPLE 2
• Network Configuration: Address size is 8 bytes,
Inferred destination addressing
• Source address: 0x0807060504030201 where
LSB (0x01) is at address 0x1F
• Destination address: 0x9897969594939291
• Network header: BA BA
• Network payload: AB AB
• Security level: 0x07
• Packet: Data packet
6.8.5.1 Transmission
1. Host MCU constructs the frame and loads the
buffer:
15 || 89 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 55 2E || BA BA AB AB
2. Host MCU configures:
- SECSUITE to 0x07
- SECKEY to
0x0F0E0D0C0B0A09080706050403020100,
where LSB (0x00) is at address 0x40
- SECNONCE
0x08070605040302015555555506, where
MSB (0x08) is at address 0x5c.
3. —
4. —
5. —
6. —
7. Host MCU issues TXST.
8. MRF24XA configures:
- SECHDRINDX to 0x15
- SECPAYINDX to 0x17
- SECENDINDX to 0x18.
9. MRF24XA performs CCM* authentication and
encryption, where BA BA AB AB is encrypted to
BA BA E6 E5, and the following MIC tag is
attached:
77 FE 46 E2 D4 0E 1D C6 34 D9 34 36 4F 28 2F
D8
10. MRF24XA appends CRC: 0x55C1.
11. MRF24XA transmits the packet to the medium.
Different IF is received based on the register
settings (for example, TX with CSMA).
Packet transmitted to the medium:
22 || 89 55 01 02 03 04 05 06 07 08 || 55 2E ||
BA BA E6 E5 77 FE 46 E2 D4 0E 1D C6 34 D9
34 36 4F 28 2F D8 || C1 55
TX Buffer (0x200) content:
2A || 89 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 55 2E || BA BA E6 E5 77 FE 46
E2 D4 0E 1D C6 34 D9 34 36 4F 28 2F D8 ||
C1 55
6.8.5.2 Reception
1. MRF24XA receives the following packet through
the antenna:
22 || 89 55 01 02 03 04 05 06 07 08 || 55 2E ||
BA BA E6 E5 77 FE 46 E2 D4 0E 1D C6 34 D9
34 36 4F 28 2F D8 || C1 55
2. MRF24XA configures:
- SECHDRINDX to 0x15 (inferred DA is
considered)
- SECPAYINDX to 0x17 (inferred DA is
considered)
- SECENDINDX to 0x20.
3. MRF24XA asserts RXIF (RXSFDIF): Packet
accepted by RX filter.
4. —
5. —
6. —
7. —
8. —
9. —
10. —
11. Host MCU configures:
- SECSUITE to 0x07
- SECKEY to
0x0F0E0D0C0B0A09080706050403020100,
where LSB (0x00) is at address 0x40
- SECNONCE to
0x08070605040302015555555506, where
MSB (0x08) is at address 0x5c.
12. Host MCU issues RXDEC.
13. MRF24XA performs CCM* de-authentication
and decryption, where the MIC tag is compared
against the received one, and BA BA E6 E5 is
decrypted to BA BA AB AB.
14. MRF24XA asserts RXDECIF (and IDLEIF).
15. —
16. SW read the entire frame from RX Buffer
(0x300):
22 || 89 55 01 02 03 04 05 06 07 08 || 55 2E ||
BA BA AB AB 77 FE 46 E2 D4 0E 1D C6 34 D9
34 36 4F 28 2F D8 || C1 55 || RSVs
DS70005023B-page 184
Preliminary
 2015 Microchip Technology Inc.