MRF24XA_15 Datasheet, PDF (230/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

MRF24XA
REGISTER 9-30: RXCON1 (MAC RECEIVE CONTROL 1 REGISTER) (CONTINUED)
ADDRESS: 0x15
bit 2
RSVCHDREN: Receive Status Vector Channel/MAC Type/Data Rate Enable bit
If bit is set, Channel, MAC type and Data Rate configurations used with the received frame are
appended after the received frame in the packet buffer, using the encoding specified for CH<3:0>,
FRMFMT and DR<2:0> (concatenated in this order when MSb is first).
1 = Append Channel, MAC type and Data Rate fields
0 = Do not append Channel, MAC type and Data Rate fields
bit 1
RSVCFOEN: Receive Status Vector CFO Enable bit
If bit is set, the estimated Carrier Frequency Offset of the received frame is appended after the
received frame in the packet buffer, using the same encoding as CFOMEAS register.
1 = Append CFO estimation
0 = Do not append estimated CFO
bit 0
Reserved: Maintain as ‘0’
9.13 External Power Amplifier (PA)/
Low-Noise Amplifier (LNA)
MRF24XA has a PA control pin (pin 20) and an LNA
control pin (pin 21) to handle external PAs and LNAs or
external antenna switch circuits. MRF24XA can also
tolerate different start-up times of different external cir-
cuits by sending or accepting data if the external cir-
cuits completes their ramp up. MRF24XA can handle
both active-high or active-low control signal sensitive
circuits.
9.13.1 EXTERNAL PA HANDLING
MRF24XA can automatically switch ON and OFF exter-
nal PA circuits as the internal functionalities require to
transmit any signal. PA pin is automatically set to its
preset active state as external PA is needed and set
back to its inactive state if PA is not needed.
To enable external PA handling, set PAEN bit of EXTPA
register to ‘1’. EXTPAP bit sets the active state of PA
control line. The current value of EXTPAP bit is the
active state of the PA line. RFOP<2:0>, field of the
Radio Operation Register shows the status of the radio
and external PA.
9.13.1.1 PA Switch Time Management
MRF24XA is used with various external PA circuits. Dif-
ferent PA circuits may have different start-up time con-
straints to reach the steady state. MRF24XA can
manage to start transmitting if both the internal and
external PA circuits are ready to operate.
TX2TXMA<4:0>, Transmit Power-Up to Medium
Access Configuration, defines the time delay that
MRF24XA waits after powering on the internal PA
before sending any data to transmit. Its POR default
value is calculated to cover most of the cases, but user
can redefine its value if needed.
PA2TXMA<4:0>, External Power Amplifier Power-Up
to Medium Access Configuration, defines the time
delay that MRF24XA waits after powering on the exter-
nal PA before sending any data to transmit.
Figure 9-7 illustrates the method of PA time
management of MRF24XA.
DS70005023C-page 230
Preliminary
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