English
Language : 

MRF24XA_15 Datasheet, PDF (110/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF
MRF24XA
REGISTER 4-5: TXCON (TRANSMIT CONTROL REGISTER) (CONTINUED)
ADDRESS: 0x12
bit 4
TXBUFEMPTY: TX Buffer Empty bit
TXBUFEMPTY = 1 indicates that the host MCU can safely start writing a new frame to the buffer with-
out overwriting any content that is in use. Writing a single byte to the buffer causes this bit to be
cleared. TXBUFEMPTY = 0 does not prevent the host from writing further bytes to the buffer.
TXBUFEMPTY is set by the device when transmission is complete.
1 = MCU can safely start writing a new frame to the buffer
0 = Buffer is full, or being written to
When TRXMODE = 00:
(PACKET) mode is configured then TXBUFEMPTY is set at the same time as TXST is cleared. An
interrupt is also generated. Therefore, this bit provides no extra information.
When TRXMODE = 10:
(TXSTREAMING) mode is configured then TXBUFEMPTY is set at the same time as one of the buf-
fers becomes free, while TXST may be set. Therefore, the host MCU uses TXBUFEMPTY to ensure
that it can start loading the next frame to the buffers without overwriting a packet being sent
(TXOVFIF).
bit 3
CSMAEN: CSMA-CA Enable bit
This bit enables CSMA-CA algorithm before transmission.
bit 2-0
1 = CSMA-CA enabled
0 = CSMA-CA disabled
DR<2:0>: Transmit Data Rate Field bits
111 = Reserved
110 = 2 Mbps
101 = 1 Mbps
100 = 500 kbps
011 = 250 kbps
010 = 125 kbps
001 = Reserved
000 = Reserved
When transmitting an Auto-ACK frame with Adaptive Data Rate in response to a received frame, the
AckDataRate field in the received frame automatically determines the data rate of the PHY, and not
by this Register field. In all other cases, use this Register field as the current PHY data rate when
transmitting.
The PHY determines the data rate for all received frames regardless of this Register field and the
Adaptive Data Rate Configuration. For more information, refer to Register 4-2.
Note 1:
2:
Transmission may include automatic security processing, CRC appending, CSMA-CA channel access,
Acknowledge reception and retransmissions depending on the register Configuration and the Frame Control
field of the frame to be transmitted.
Setting TXST bit in either Sleep/RFOFF state, device transits to TX state for packet transmission.
DS70005023C-page 110
Preliminary
 2015 Microchip Technology Inc.