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| MRF24XA_15 Datasheet, PDF (183/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF | |||
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6.8.4
NWK LAYER SECURITY
EXAMPLE 1
⢠Network Configuration: Address size is 8 bytes
⢠Source address: 0x0807060504030201, where
LSB (0x01) is at address 0x1F
⢠Destination address: 0x9897969594939291
⢠Network header: BA BA
⢠Network payload: AB AB
⢠NET security level: 0x01
⢠Packet: Data packet
6.8.4.1 Transmission
1. Host MCU constructs the frame and loads the
buffer:
15 || C9 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 55 2E || BA BA AB AB
2. Host MCU configures:
- SECSUITE to 0x01
- SECKEY to
0x0F0E0D0C0B0A09080706050403020100,
where LSB (0x00) is at address 0x40
- SECNONCE
0x08070605040302015555555506, where
MSB (0x08) is at address 0x5c.
3. â
4. â
5. â
6. â
7. Host MCU issues TXST.
8. MRF24XA configures:
- SECHDRINDX to 0x15
- SECPAYINDX to 0x17
- SECENDINDX to 0x18.
9. MRF24XA performs CCM* authentication,
where the following MIC tag is attached:
FB 17 32 26
10. MRF24XA appends CRC: 0xAA70.
11. MRF24XA transmits the packet to the medium.
Different IF is received based on the register
settings (for example, TX with CSMA).
TX Buffer (0x200) content:
1E || C9 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 55 2E || BA BA FB 17 32 26 || 70
AA
MRF24XA
6.8.4.2 Reception
1. MRF24XA receives the following packet through
the antenna:
1E || C9 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 55 2E || BA BA FB 17 32 26 || 70
AA
2. MRF24XA configures:
- SECHDRINDX to 0x15
- SECPAYINDX to 0x17
- SECENDINDX to 0x18.
3. MRF24XA asserts RXIF (RXSFDIF): Packet
accepted by RX filter.
4. â
5. â
6. â
7. â
8. â
9. â
10. â
11. Host MCU configures:
- SECSUITE to 0x04
- SECKEY to
0x0F0E0D0C0B0A09080706050403020100,
where LSB (0x00) is at address 0x40
- SECNONCE to
0x08070605040302015555555506, where
MSB (0x08) is at address 0x5c.
12. Host MCU issues RXDEC.
13. MRF24XA performs CCM* de-authentication,
where the MIC tag is compared against the
received one.
14. MRF24XA asserts RXDECIF (and IDLEIF).
15. â
16. SW read the entire frame from RX Buffer
(0x300):
1E || C9 55 91 92 93 94 95 96 97 98 01 02 03 04
05 06 07 08 || 55 2E || BA BA FB 17 32 26 || 70
AA || RSVs
ï£ 2015 Microchip Technology Inc.
Preliminary
DS70005023B-page 183
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