MRF24XA_15 Datasheet, PDF (164/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

MRF24XA
5.8 Security Examples
The following section provides examples for the usage
of MRF24XA security.
5.8.1
802.15.4-2006 COMPLIANT FRAME
ANNEX C.2.2 (TYPE A)
Configuration:
• Network Configuration: Extended address, PAN
Compression, and ACKReq
• Source address: 0xACDE480000000001, where
01 is at address 0x1F
• Destination address: 0xACDE480000000002
• PANID 0x4321, where 21 is at address 0x29
• Payload: 61 62 63 64
• Frame counter: 0x00000005
• Security level: 0x04
• Packet: Data packet.
5.8.1.1 Transmission
For 802.15.4-2006 compliant, follow these
transmission flow:
1. Host MCU constructs the frame and loads the
buffer:
1E || 69 DC 84 21 43 02 00 00 00 00 48 DE AC
01 00 00 00 00 48 DE AC || 04 05 00 00 00 || 61
62 63 64
2. —
3. —
4. —
5. —
6. Host MCU configures SECKEY.
0xC0C1C2C3C4C5C6C7C8C9CACBCCCD-
CECF, where LSB (0xCF) is at address 0x40
7. Host MCU clears DTSM.
8. Host MCU issues TXST.
9. MRF24XA configures:
- SECSUITE to 0x04
- SECNONCE to 0xAC-
DE4800000000010000000504, where
MSB (0xAC) is at address 0x5C
- SECHDRINDX to 0x01
- SECPAYINDX to 0x1B
- SECENDINDX to 0x1E.
10. MRF24XA performs CCM* encryption, where
61 62 63 64 is encrypted to D4 3E 02 2B.
11. MRF24XA appends CRC: 0x18E0 .
12. MRF24XA transmits the packet to the medium.
MRF24XA is waiting for an ACKnowledge
frame. Different IF is received based on the reg-
ister settings (for example, TX with CSMA). TX
Buffer (0x200) content:
20 || 69 DC 84 21 43 02 00 00 00 00 48 DE AC
01 00 00 00 00 48 DE AC || 04 05 00 00 00 || D4
3E 02 2B || E0 18
5.8.1.2 Reception
1. MRF24XA receives the following packet through
the antenna:
20 || 69 DC 84 21 43 02 00 00 00 00 48 DE AC 01
00 00 00 00 48 DE AC || 04 05 00 00 00 || D4 3E
02 2B || E0 18
2. MRF24XA configures:
- SECSUITE to 0x04
- SECNONCE to 0xAC-
DE4800000000010000000504, where
MSB (0xAC) is at address 0x5C
- SECHDRINDX to 0x01
- SECPAYINDX to 0x1B
- SECENDINDX to 0x1E.
3. MRF24XA asserts RXIF (RXSFDIF):
- Packet accepted by RX filter
- ACK frame: 05 || 02 10 84 || 05 E2 sent to
medium (asserts TXSFD, TXMAIF).
4. —
5. Host MCU downloads SECKEY
0xC0C1C2C3C4C5C6C7C8C9CACBCCCD-
CEC F, where LSB (0xCF) is at address 0x40.
6. Host MCU issues RXDEC.
7. MRF24XA performs CCM* decryption, D4 3E 02
2B is decrypted to 61 62 63 64.
8. MRF24XA asserts RXDECIF (and IDLEIF).
9. —
10. —
11. —
12. —
13. —
14. —
15. SW read the entire frame from the Rx Buffer
(0x300):
20 || 69 DC 84 21 43 02 00 00 00 00 48 DE AC 01
00 00 00 00 48 DE AC || 04 05 00 00 00 || 61 62 63
64 || E0 18 || RSVs
DS70005023C-page 164
Preliminary
 2015 Microchip Technology Inc.