MRF24XA_15 Datasheet, PDF (165/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

5.8.2
802.15.4-2006 COMPLIANT FRAME
ANNEX C.2.3 (TYPE A)
• Network Configuration: Extended address,
ACKReq
• Source address: 0xACDE480000000001, where
01 is at address 0x1F
• Source PANID: 0X4321, where 21 is at address
0x29
• Destination address: 0xACDE480000000002
• Destination PANID: 0xFFFF
• Payload: 01 CE
• Frame counter: 0x00000005
• Security level: 0x06
• Packet: Command packet
5.8.2.1 Transmission
1. Host MCU constructs the frame and loads the
buffer:
1E || 2B DC 84 21 43 02 00 00 00 00 48 DE AC
FF FF 01 00 00 00 00 48 DE AC || 06 05 00 00
00 || 01 CE
2. —
3. —
4. —
5. —
6. Host MCU configures SECKEY
0xC0C1C2C3C4C5C6C7C8C9CACBCCCD-
CECF, where LSB (0xCF) is at address 0x40.
7. Host MCU clears DTSM register.
8. Host MCU issues TXST.
9. MRF24XA configures:
- SECSUITE to 0x06
- SECNONCE to 0xAC-
DE4800000000010000000504, where
MSB (0xAC) is at address 0x5C
- SECHDRINDX to 0x01
- SECPAYINDX to 0x1E (remember when
Type = CMD, first octet of payload is not
encrypted)
- SECENDINDX to 0x1E.
10. MRF24XA performs CCM* authentication with
encryption, where 01 CE is encrypted to 01 D8,
and the following MIC tag is attached:
4F DE 52 90 61 F9 C6 F1
11. MRF24XA appends CRC: 0x4FE4.
MRF24XA
12. MRF24XA transmits the packet to the medium.
MRF24XA is waiting for an ACK frame. Different
IF is received based on the register settings (for
example, TX with CSMA).
TX Buffer (0x200) content:
28 || 2B DC 84 21 43 02 00 00 00 00 48 DE AC
FF FF 01 00 00 00 00 48 DE AC || 06 05 00 00
00 || 01 D8 || 4F DE 52 90 61 F9 C6 F1 || E4 4F
5.8.2.2 Reception
1. MRF24XA receives the following packet through
the antenna:
28 || 2B DC 84 21 43 02 00 00 00 00 48 DE AC
FF FF 01 00 00 00 00 48 DE AC || 06 05 00 00
00 || 01 D8 || 4F DE 52 90 61 F9 C6 F1 || E4 4F
2. MRF24XA configures:
- SECSUITE to 0x06
- SECNONCE to 0xAC-
DE4800000000010000000504, where
MSB (0xAC) is at address 0x5C
- SECHDRINDX to 0x01
- SECPAYINDX to 0x1E
- SECENDINDX to 0x26.
3. MRF24XA asserts RXIF (RXSFDIF):
- Packet accepted by RX filter
- ACK frame: 05 || 02 10 84 || 05 E2 sent to
medium (asserts TXSFD, TXMAIF).
4. —
5. Host MCU downloads SECKEY
0xC0C1C2C3C4C5C6C7C8C9CACBCCCD-
CECF, where LSB (0xCF) is at address 0x40.
6. Host MCU issues RXDEC.
7. MRF24XA performs CCM* de-authentication
and decryption, where the MIC tag is compared
against the received one, and 01 D8 is
decrypted to 01 CE.
8. MRF24XA asserts RXDECIF (and IDLEIF).
9. —
10. —
11. —
12. —
13. —
14. —
15. SW can read the entire frame from Rx Buffer
(0x300):
28 || 2B DC 84 21 43 02 00 00 00 00 48 DE AC
FF FF 01 00 00 00 00 48 DE AC || 06 05 00 00
00 || 01 CE || 4F DE 52 90 61 F9 C6 F1 || E4 4F
|| RSVs
 2015 Microchip Technology Inc.
Preliminary
DS70005023C-page 165