MRF24XA_15 Datasheet, PDF (104/258 Pages) Microchip Technology – Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4™ RF

MRF24XA
REGISTER 4-3: MACCON1 (MAC CONTROL 1 REGISTER)
R/W-00
R/W-001
R/W-1
TRXMODE<1:0>
ADDRSZ<2:0>
CRCSZ
bit 7
ADDRESS: 0x10
R/W-0
R/W-0
FRMFMT SECFLAGOVR
bit 0
Legend: R = Readable bit
-n = Value at POR
r = Reserved
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-3
bit 2
bit 1
bit 0
TRXMODE<1:0>: TX/RX Mode Select Field bits
11 = Reserved
10 = TX-Streaming mode. In this mode, use both buffers for packet transmission. When issuing TRX-
MODE = 10, RXEN is cleared. SPI addresses 0x200 to 0x27F access Buffer 1 or Buffer 2 in
alternation. Access to 0x37F through 0x383 has non-defined effect.
01 = RX-Streaming mode. In this mode, use both buffers for packet reception. When issuing TRX MODE
= 01, TXST and TXENC/RXDEC bits are cleared and RXEN is set. SPI addresses 0x300 to 0x383
access Buffer 1 or Buffer 2 in alternation. In this mode, Proprietary mode packets other than stream-
ing type are automatically discarded. Access to 0x200 through 0x283 has non-defined effect.
00 = Packet mode. In this mode, Buffer 1 is used as a Transmit while Buffer 2 as a Receive packet buffer.
SPI addresses from 0x200 to 0x27F access Buffer 1. SPI addres ses 0x300 to 0x383 access Buffer
2. TRXMODE = 00 is mandatory when FRMFMT = 0.
ADDRSZ<2:0>: Source/Destination Address Size Fields bits^{(1, 2)}
The size of the Source and Destination addresses for Proprietary packet. Note that this field has no
effect on the processing IEEE 802.15.4 frames.
111 = 8 octets
110 = 7 octets
101 = 6 octets
100 = 5 octets
011 = 4 octets
010 = 3 octets
001 = 2 octets
000 = 1 octet
CRCSZ: CRC Size bit
This bit indicates the size of the CRC field in each packet.
1 = 2 octets
0 = 0 octet
FRMFMT: MAC frame format bit adopted by the network bit⁽³⁾
This bit determines the frame format used in the network.
1 = Proprietary
0 = IEEE 802.15.4 standard compliant.
SECFLAGOVR: Security Flag Override bit
The user can override security flags used in the CCM-CTR, CBC-MAC and CCM operations, otherwise
the device uses the standard (2003/2006) definition.
Note 1:
2:
3:
Zero-length address occurs when the corresponding DAddrPrsnt/SAddrPrsnt bits of the packet Frame Con-
trol field are set to ‘0’.
Use ADDRSZ field while receiving and transmitting, and must not be modified while RXEN or TXST is set.
Use FRMFMT field while receiving and transmitting, and must not be modified while RXEN or TXST is set. In
Debug mode, this register bit is used to determine the frame format for both Tx/Rx frame in the packet buf-
fers.
DS70005023C-page 104
Preliminary
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